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Method, circuit library and computer program product for implementing enhanced performance and reduced leakage current for ASIC designs

机译:用于为ASIC设计实现增强的性能和减小的泄漏电流的方法,电路库和计算机程序产品

摘要

A method, apparatus and computer program product are provided for implementing application specific integrated circuit (ASIC) designs having high performance and reduced leakage current. Standard voltage threshold (SVT) circuits in a SVT circuit library are identified. For each SVT circuit, each SVT PFET is replaced with a low voltage threshold (LVT) PFET to provide a hybrid alternate voltage threshold (AVT) circuit. Then the AVT circuits are saved in an alternate voltage threshold circuit library. The AVT circuit library provides enhanced performance as compared to the SVT circuit library without the high leakage current resulting from a LVT circuit library.
机译:提供了一种用于实现具有高性能和减小的泄漏电流的专用集成电路(ASIC)设计的方法,装置和计算机程序产品。识别SVT电路库中的标准电压阈值(SVT)电路。对于每个SVT电路,将每个SVT PFET替换为低电压阈值(LVT)PFET,以提供混合交流电压阈值(AVT)电路。然后,将AVT电路保存在备用电压阈值电路库中。与SVT电路库相比,AVT电路库提供了增强的性能,而没有LVT电路库导致的高泄漏电流。

著录项

  • 公开/公告号US7257781B2

    专利类型

  • 公开/公告日2007-08-14

    原文格式PDF

  • 申请/专利权人 TERRY C. COUGHLIN JR.;

    申请/专利号US20040760502

  • 发明设计人 TERRY C. COUGHLIN JR.;

    申请日2004-01-20

  • 分类号G06F17/50;

  • 国家 US

  • 入库时间 2022-08-21 21:02:38

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