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Equilibrium based vertical sync phase lock loop for video decoder

机译：基于平衡的视频解码器垂直同步锁相环

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摘要

The present invention discloses a PLL (90), which may be implemented in software, hardware, or a combination of software and hardware, which comprises a sync detector (92) adapted to output a phase error (152), a vertical sync discrete time oscillator (DTO) block (98) adapted to output a vertical sync DTO (130) based on the phase error (152), and an output logic (100) adapted to detect a vertical sync based on the vertical sync DTO (130).

机译：本发明公开了一种PLL（ 90 ），其可以以软件，硬件或软件和硬件的组合来实现，其包括适用于同步检测器（ 92 ）的输出相位误差（ 152 ），垂直同步离散时间振荡器（DTO）块（ 98 ）适用于输出垂直同步DTO（ 130 ）（基于相位误差（ 152 ））和输出逻辑（ 100 ），该逻辑适于基于垂直同步DTO（ 130）检测垂直同步）。 展开▼

著录项

公开/公告号US7274406B2

专利类型

公开/公告日2007-09-25

原文格式PDF

申请/专利权人 KARL RENNER;WALTER HEINRICH DEMMER;
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申请/专利号US20030713714

发明设计人 KARL RENNER;WALTER HEINRICH DEMMER;
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申请日2003-11-14

分类号H03L7/00;H04N5/10;

国家 US

入库时间 2022-08-21 21:02:19

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