Error detection of digital logic circuits using hierarchical neural networks

摘要

An artificial neural network for detecting and identifying errors in digital circuits is provided. Data from digital circuits are received and organized into current data set patterns by a supervisory control and data acquisition system. The supervisory control and data acquisition system transmits the current data set patterns to an artificial neural network error detection module. The artificial neural network error detection module compares the actual output of each current data set pattern to a calculated output for a corresponding stored data set pattern. The artificial neural network error detection module determines whether a match condition exists for the comparison. The artificial neural network error detection module outputs the results of the determination to a user interface.