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Phase-locked loop for synchronization with a subcarrier contained in an intelligence signal

机译:锁相环,用于与智能信号中包含的子载波同步

摘要

A phase-locked loop locks relatively quickly to a pilot tone of the stereo-multiplex signal when a new transmitter is tuned in. The stereo-multiplex signal may be multiplied in a multiplier by the quadrature component of the pilot tone generated by a digital oscillator. The result is a control signal that is provided to a low-pass filter, and the low-pass filtered control signal is provided as a control signal to an oscillator which may include a table of length N and a counter for addressing the table entries. The zero phase angle φ0 may be set by a counter offset n0 by incrementing or decrementing the counter. A table may be utilized having a virtual length N+ which is larger than the length N of the real table. To access the real table, however, the corresponding MSBs of the actual count n(k) are used which match the address space of the real table of length N.
机译:当调入新的发射机时,锁相环会相对较快地锁定到立体声多路复用信号的导频音。立体声多路复用信号可以在乘法器中乘以数字振荡器产生的导频的正交分量。 。结果是将控制信号提供给低通滤波器,并且将低通滤波后的控制信号作为控制信号提供给振荡器,该振荡器可以包括长度为N的表和用于寻址表项的计数器。零相位角φ 0 可以通过增加或减少计数器的偏移n 0 来设置。可以利用具有大于真实表的长度N的虚拟长度N +的表。但是,为了访问实表,使用了实际计数为n(k)的相应MSB,它们与长度为N的实表的地址空间匹配。

著录项

  • 公开/公告号US7164735B2

    专利类型

  • 公开/公告日2007-01-16

    原文格式PDF

  • 申请/专利权人 STEFAN GIERL;CHRISTOPH BENZ;

    申请/专利号US20020096341

  • 发明设计人 CHRISTOPH BENZ;STEFAN GIERL;

    申请日2002-03-11

  • 分类号H04D3/24;H03L7/06;

  • 国家 US

  • 入库时间 2022-08-21 21:00:52

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