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Deep trench isolation of embedded DRAM for improved latch-up immunity
Deep trench isolation of embedded DRAM for improved latch-up immunity
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机译:嵌入式DRAM的深沟槽隔离可提高抗闩锁性
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摘要
A protective structure for blocking the propagation of defects generated in a semiconductor device is disclosed. In an exemplary embodiment, the structure includes a deep trench isolation formed between a memory storage region of the semiconductor device and a logic circuit region of the semiconductor device, the deep trench isolation being filled with an insulative material. The deep trench isolation thereby prevents the propagation of crystal defects generated in the logic circuit region from propagating into the memory storage region.
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