Data transfer device which executes DMA transfer, semiconductor integrated circuit device and data transfer method

摘要

A data transfer device which controls data transfer between a first memory device and a second memory device, includes a first transfer arbiter circuit (11) and a second transfer arbiter circuit (12). The first transfer arbiter circuit (11) outputs, in response to a transfer instruction for transfer of data (50) from the first memory device (20) to the second memory device (30), first transfer instructions to transfer data (50) in a first transfer unit (BufSize) in an order of addresses. The second transfer arbiter circuit (12) outputs, in response to the first transfer instruction, second transfer instructions to transfer the data (51) of the first transfer unit (BufSize) in a second transfer unit (BusSize) smaller than the first transfer unit (BufSize). The second transfer arbiter circuit (12) outputs the second transfer instruction in an order of accessible addresses in the first and second memory devices (20, 30).