LOW VOLTAGE REGULATED CASCADE CIRCUITS AND CMOS ANALOG CIRCUITS

摘要

A low voltage regulated cascade circuit and a CMOS analog circuit using the same are provided to maintain a high output resistance and a wide output voltage swing width at an operation voltage under one volt by maintaining a higher threshold voltage than the threshold voltage of NMOS transistors. A low voltage regulated cascade circuit includes a first MOS transistor(NM2), a second MOS transistor(NM1), a third MOS transistor(PM1), and a first current source(CS2). The first MOS transistor(NM2) of a first conductive type is connected between an output terminal and a first node. The second MOS transistor(NM1) of a first conductive type applies a bias voltage to a gate and is connected between the first node and a second power terminal. A third MOS transistor(PM1) of a second conductive type different from the first conductive type is connected between a first power terminal and a gate of the first MOS transistor(NM2). The first current source(CS2) is connected between a second power voltage and the gate of the first MOS transistor(NM2).