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FIN FIELD EFFECT TRANSISTOR MEMORY CELL, FIN FIELD EFFECT TRANSISTOR MEMORY CELL ARRANGEMENT, AND METHOD FOR THE PRODUCTION OF A FIN FIELD EFFECT TRANSISTOR MEMORY CELL
FIN FIELD EFFECT TRANSISTOR MEMORY CELL, FIN FIELD EFFECT TRANSISTOR MEMORY CELL ARRANGEMENT, AND METHOD FOR THE PRODUCTION OF A FIN FIELD EFFECT TRANSISTOR MEMORY CELL
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机译:鳍式场效应晶体管存储池,鳍式场效应晶体管存储池布置以及制造鳍式场效应晶体管存储池的方法
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摘要
The present invention relates to a process for producing a pin field effect transistor memory cell (200), the pin field effect transistor memory cell arrangement, and the pin field effect transistor memory cell. The fin field effect transistor memory cell comprises first and second source / drain regions 201 and 202, and gate regions. Memory cells surrounding the channel region between the first source / drain region and the second source / drain region further comprises a semiconductor fin (204). In addition, at least in part to the charge storage layer disposed on the gate region (207, 208) can be provided. A word line region (205, 206) is disposed on at least a section of the charge storage layer. A charge storage layer, the charge carriers by electrical pin field effect transistor is a pre-defined potential to the memory cells is selectively introduced into the charge storage layer or be designed to be removed from the charge storage layer.
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