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Automatic verification test cases that implicitly connected to the automatic execution of test cases
Automatic verification test cases that implicitly connected to the automatic execution of test cases
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机译:隐式连接到自动执行测试用例的自动验证测试用例
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摘要
1.the system u0434u043bu00a0 verification of results u0434u0435u0439u0441u0442u0432u0438u00a0 applied to annex, the system contains the expected u0441u043eu0441u0442u043eu00a0u043du0438u0439 u0434u043bu00a0 u0432u044bu0447u0438u0441u043bu0435u043du0438u00a0 expected the result u043fu0440u0438u043cu0435u043du0435u043du0438u00a0 u0434u0435u0439u0441u0442u0432u0438u00a0 to annex and u0434u043bu00a0 u043eu0431u043du043eu0432u043bu0435u043du0438u00a0 expected u0441u043eu0441u0442u043eu00a0u043du0438u00a0 u043fu0440u0438u043bu043eu0436u0435u043du0438u00a0 and dispatch verification u0434u043bu00a0 u043fu043eu0434u0434u0435u0440u0436u0430u043du0438u00a0 current u0441u043eu0441u0442u043eu00a0u043du0438u00a0 appli u043du0438u00a0 and u0441u0440u0430u0432u043du0435u043du0438u00a0 expected u0441u043eu0441u0442u043eu00a0u043du0438u00a0 u043fu0440u0438u043bu043eu0436u0435u043du0438u00a0 current u0441u043eu0441u0442u043eu00a0u043du0438u0435u043c u043fu0440u0438u043bu043eu0436u0435u043du0438u00a0.;2. system 1 in which the generator is expected u0441u043eu0441u0442u043eu00a0u043du0438u0439 u043eu043fu0440u0435u0434u0435u043bu00a0u0435u0442 expected u0441u043eu0441u0442u043eu00a0u043du0438u0435 u043fu0440u0438u043bu043eu0436u0435u043du0438u00a0 to u0438u0441u043fu043eu043bu043du0435u043du0438u00a0 u0434u0435u0439u0441u0442u0432u0438u00a0.;3. system 1 in which the generator is expected u0441u043eu0441u0442u043eu00a0u043du0438u0439 u043eu043fu0440u0435u0434u0435u043bu00a0u0435u0442 expected u0441u043eu0441u0442u043eu00a0u043du0438u0435 u043fu0440u0438u043bu043eu0436u0435u043du0438u00a0 on request.;4. the system 1, the system additionally contains the expected u0441u043eu0441u0442u043eu00a0u043du0438u0439 u0434u043bu00a0 transmission dispatch verification of expected u0441u043eu0441u0442u043eu00a0u043du0438u00a0 component.;5. the system according to paragraph 4, in which the generator is expected u0441u043eu0441u0442u043eu00a0u043du0438u0439 u00a0u0432u043bu00a0u0435u0442u0441u00a0 external to the dispatcher checks.;6. the system according to paragraph 4, the system further includes a database component that supports the exchange of data with the expected u0441u043eu0441u0442u043eu00a0u043du0438u0439, in which base yes u043du043du044bu0445 components is expected u0441u043eu0441u0442u043eu00a0u043du0438u0439 generator in determining the expected u0441u043eu0441u0442u043eu00a0u043du0438u00a0 component.;7. the system 1, the system further includes a control example that supports the exchange of data and independent from the dispatcher checks, u0434u043bu00a0 u0438u0441u043fu043eu043bu043du0435u043du0438u00a0 u0434u0435u0439u0441 u0442u0432u0438u00a0.;8. system 1, which contains the incentive effect and parameter.;9. system 1 in which the action is, at least one of the functional test and integral test.;10. the system 1 is further u0441u043eu0434u0435u0440u0436u0430u0449u0430u00a0 structure expected u0441u043eu0441u0442u043eu00a0u043du0438u0439 u043fu0440u0438u043bu043eu0436u0435u043du0438u00a0 and structure of u0441u043eu0441u0442u043eu00a0u043du0438u00a0 u043fu0440u0438u043bu043eu0436u0435u043du0438u00a0.;11. the system on p.10, in which data structure expected u0441u043eu0441u0442u043eu00a0u043du0438u0439 u043fu0440u0438u043bu043eu0436u0435u043du0438u00a0 contains information from the generator u043fu0440u0438u043du00a0u0442u0443u044e expected u0441u043eu0441u0442u043eu00a0u043du0438u0439.;12. the system on p.10, in which the data structure of the u0441u043eu0441u0442u043eu00a0u043du0438u00a0 u043fu0440u0438u043bu043eu0436u0435u043du0438u00a0 contains information u043fu0440u0438u043du00a0u0442u0443u044e from type checking.;13. system 1, in which the control test compares the expected u0441u043eu0441u0442u043eu00a0u043du0438u0435 u043fu0440u0438u043bu043eu0436u0435u043du0438u00a0 current u0441u043eu0441u0442u043eu00a0u043du0438u0435u043c u043fu0440u0438u043bu043eu0436u0435u043du0438u00a0 in offline mode.;14. system 1, in which the control test compares the expected u0441u043eu0441u0442u043eu00a0u043du0438u0435 u043fu0440u0438u043bu043eu0436u0435u043du0438u00a0 current u0441u043eu0441u0442u043eu00a0u043du0438u0435u043c u043fu0440u0438u043bu043eu0436u0435u043du0438u00a0 in operational mode.;15. system 1 in which the generator is expected u0441u043eu0441u0442u043eu00a0u043du0438u0439 u0437u0430u0433u0440u0443u0436u0430u0435u0442u0441u00a0 from at least one of the database and network folders.;16. system 1 in which the dispatcher checks u043fu0440u0435u0434u043eu0441u0442u0430u0432u043bu00a0u0435u0442 notice of comparing expected u0441u043eu0441u0442u043eu00a0u043du0438u00a0 u043fu0440u0438u043bu043eu0436u0435u043du0438u00a0 current u0441u043eu0441u0442u043eu00a0u043du0438u0435u043c u043fu0440u0438u043bu043eu0436u0435u043du0438u00a0.;17. the system on p.16, which notice u043eu0441u0443u0449u0435u0441u0442u0432u043bu00a0u0435u0442u0441u00a0 in offline mode.;18.u043cu0430u0448u0438u043du043eu0447u0438u0442u0430u0435u043cu044bu0439 booster, which follows the structure of the data, the host contains a first data field, carried in the device manager test with dunn s, u043fu0440u0435u0434u0441u0442u0430u0432u043bu00a0u044eu0449u0438u0435 expected u0441u043eu0441u0442u043eu00a0u043du0438u0435 u043fu0440u0438u043bu043eu0436u0435u043du0438u00a0 based on u0434u0435u0439u0441u0442u0432u0438u00a0, which should be implemented for u043fu0440u0438u043bu043eu0436u0435u043du0438u00a0, and the second field data saved in the the dispatcher checks on the data.u043fu0440u0435u0434u0441u0442u0430u0432u043bu00a0u044eu0449u0438u0435 current u0441u043eu0441u0442u043eu00a0u043du0438u0435 u043fu0440u0438u043bu043eu0436u0435u043du0438u00a0 after u043fu0440u0438u043cu0435u043du0435u043du0438u00a0 u0434u0435u0439u0441u0442u0432u0438u00a0, in which the u0437u0430u0434u0430u0435u0442u0441u00a0 and u043fu0440u0438u043cu0435u043du00a0u0435u0442u0441u00a0 through control sample, which u00a0u0432u043bu00a0 u0435u0442u0441u00a0 independent of the verification manager.;19. u043cu0430u0448u0438u043du043eu0447u0438u0442u0430u0435u043cu044bu0439 host on p.18, in which multiple component devices u043fu0440u0435u0434u043eu0441u0442u0430u0432u043bu00a0u044eu0442 data data on the respective first and second u043fu043eu043bu00a0u043c com an increase u043fu0440u0438u043bu043eu0436u0435u043du0438u00a0.;20.method of checking the results of u0434u0435u0439u0441u0442u0432u0438u00a0 applied to annex, in this way contains stages in which u0441u043eu0445u0440u0430u043du00a0u044eu0442 current u0441u043eu0441u0442u043eu00a0u043du0438u0435 u043fu0440u0438u043bu043eu0436u0435u043du0438u00a0, u0432u044bu0447u0438u0441u043bu00a0u044eu0442 expected u0434u0430u0435u043cu043eu0435 u0441u043eu0441u0442u043eu00a0u043du0438u0435 u043fu0440u0438u043bu043eu0436u0435u043du0438u00a0 of u0434u0435u0439u0441u0442u0432u0438u00a0, which must be applied to the annex, u0441u043eu0445u0440u0430u043du00a0u044eu0442 expected u0441u043eu0441u0442u043eu00a0u043du0438u0435 u043fu0440u0438u043bu043eu0436u0435u043du0438u00a0, u0438u0441u043fu043eu043bu043du00a0u044eu0442 effectu043eu0431u043du043eu0432u043bu00a0u044eu0442 current u0441u043eu0441u0442u043eu00a0u043du0438u0435 u043fu0440u0438u043bu043eu0436u0435u043du0438u00a0 and compare the expected u0441u043eu0441u0442u043eu00a0u043du0438u0435 u043fu0440u0438u043bu043eu0436u0435u043du0438u00a0 and current u0441u043eu0441u0442u043eu00a0u043du0438u0435 u043fu0440u0438u043bu043eu0436u0435u043du0438u00a0.;21. way on p.20, the method further includes a step in which a copy of the reference current u0441u043eu0441u0442u043eu00a0u043du0438u00a0.;22. way on p.20, the method further includes a step in which the u0441u043eu0441u0442u043eu00a0u043du0438u0435 component are expected as a result of u043fu0440u0438u043cu0435u043du0435u043du0438u00a0 u0434u0435u0439u0441u0442u0432u0438u00a0 to com u043fu043eu043du0435u043du0442u0443 u043fu0440u0438u043bu043eu0436u0435u043du0438u00a0.;23. method for u0441u043eu0441u0442u043eu00a0u043du0438u0435 p.22, in which the component stored in the data structure of the expected u0441u043eu0441u0442u043eu00a0u043du0438u0439 u043fu0440u0438u043bu043eu0436u0435u043du0438u00a0.;24. method for u0441u043eu0441u0442u043eu00a0u043du0438u0435 p.22, in which the component u043eu043fu0440u0435u0434u0435u043bu00a0u0435u0442u0441u00a0 generator expected u0441u043eu0441u0442u043eu00a0u043du0438u0439.;25. way on p.24, which generator is expected u0441u043eu0441u0442u043eu00a0u043du0438u0439 u00a0u0432u043bu00a0u0435u0442u0441u00a0 external to the dispatcher checks.;26. way on p.20, the method further includes stages in which u0443u0432u0435u0434u043eu043cu043bu00a0u044eu0442 control example, if the expected and the current u0441u043eu0441u0442u043eu00a0u043du0438u00a0 u043fu0440u0438u043bu043eu0436u0435u043du0438u00a0 don't match most of the time.;27. way on p.20, in which the phase u0441u0440u0430u0432u043du0435u043du0438u00a0 u043eu0441u0443u0449u0435u0441u0442u0432u043bu00a0u0435u0442u0441u00a0 using xml.;28. method for u0441u043eu0445u0440u0430u043du0435u043du0438u00a0 p.20, in which the phase of the current u0441u043eu0441u0442u043eu00a0u043du0438u00a0 u043fu0440u0438u043bu043eu0436u0435u043du0438u00a0 u043eu0441u0443u0449u0435u0441u0442u0432u043bu00a0u0435u0442u0441u00a0 after the applied force.;29. way on p.20, in which the phase u0441u043eu0445u0440u0430u043du0435u043du0438u00a0 expected u0441u043eu0441u0442u043eu00a0u043du0438u00a0 u043fu0440u0438u043bu043eu0436u0435u043du0438u00a0 u043eu0441u0443u0449u0435u0441u0442u0432u043bu00a0u0435u0442u0441u00a0 before applied effect.;30. u043cu0430u0448u0438u043du043eu0447u0438u0442u0430u0435u043cu044bu0439 host, the host is u043cu0430u0448u0438u043du043eu0447u0438u0442u0430u0435u043cu044bu0435 instructions u0434u043bu00a0 u0432u044bu043fu043eu043bu043du0435u043du0438u00a0 phases during which u0432u044bu0447u0438u0441u043bu00a0u044eu0442 expected u0441u043eu0441u0442u043eu00a0u043du0438u0435 u043fu0440u0438u043bu043eu0436u0435u043du0438u00a0 of u0434u0435u0439u0441u0442u0432 u0438u00a0, which must be applied to the annex, u0438u0441u043fu043eu043bu043du00a0u044eu0442 effect u043eu043fu0440u0435u0434u0435u043bu00a0u044eu0442 current u0441u043eu0441u0442u043eu00a0u043du0438u0435 u043fu0440u0438u043bu043eu0436u0435u043du0438u00a0 and compare the expected u0441u043eu0441u0442u043eu00a0u043du0438u0435 u043fu0440u0438u043bu043eu0436u0435u043du0438u00a0 and u0442u0435u043au0443u0449u0435 (e u0441u043eu0441u0442u043eu00a0u043du0438u0435 u043fu0440u0438u043bu043eu0436u0435u043du0438u00a0.;31. a carrier for u043cu0430u0448u0438u043du043eu0447u0438u0442u0430u0435u043cu044bu0439 p.30 and host further has u043cu0430u0448u0438u043du043eu0447u0438u0442u0430u0435u043cu044bu0435 instructions u0434u043bu00a0 u0432u044bu043fu043eu043bu043du0435u043du0438u00a0 phase, which are expected to u0441u043eu0441u0442u043eu00a0u043du0438u0435 u043eu043cu043fu043eu043du0435u043du0442u0430, expected as a result of u043fu0440u0438u043cu0435u043du0435u043du0438u00a0 u0434u0435u0439u0441u0442u0432u0438u00a0 to u043fu0440u0438u043bu043eu0436u0435u043du0438u00a0 component.;32. a carrier for u043cu0430u0448u0438u043du043eu0447u0438u0442u0430u0435u043cu044bu0439 p.31, with a further has u043cu0430u0448u0438u043du043eu0447u0438u0442u0430u0435u043cu044bu0435 instructions u0434u043bu00a0 u0432u044bu043fu043eu043bu043du0435u043du0438u00a0 phase, which is expected to u0441u043eu0445u0440u0430u043du00a0u044eu0442 u0441u043eu0441u0442u043eu00a0u043du0438u0435 u043eu043cu043fu043eu043du0435u043du0442u0430 data structure expected u0441u043eu0441u0442u043eu00a0u043du0438u0439 u043fu0440u0438u043bu043eu0436u0435u043du0438u00a0.;33. a carrier for u043cu0430u0448u0438u043du043eu0447u0438u0442u0430u0435u043cu044bu0439 p.31, with a further has u043cu0430u0448u0438u043du043eu0447u0438u0442u0430u0435u043cu044bu0435 instructions u0434u043bu00a0 u0432u044bu043fu043eu043bu043du0435u043du0438u00a0 phase, which u043fu0440u0435u0434u043eu0441u0442u0430u0432u043bu00a0u044eu0442 notice, if the u0441u043eu0441u0442u043eu00a0u043du0438u0435 component essentially does not coincide with the current u0441u043eu0441u0442u043eu00a0u043du0438u0435u043c u043fu0440u0438u043bu043eu0436u0435u043du0438u00a0.
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