首页> 外国专利> Transistor device with mos - structure, in which a change in the output impedance is reduced due to a manufacturing error, a method for their preparation, as well as formed in this way, cmos - circuit

Transistor device with mos - structure, in which a change in the output impedance is reduced due to a manufacturing error, a method for their preparation, as well as formed in this way, cmos - circuit

机译:具有mos结构的晶体管器件,其中由于制造误差而减小了输出阻抗的变化;一种晶体管器件的制备方法,以及以此方式形成的CMOS电路

摘要

Mos (metal - oxide - semiconductors) - transistor, to a gate electrode (117), a drain electrode (115) as well as a source electrode (113), wherein the mos - transistor (111) a a - state - resistor ron when the mos - transistor (111) in a - state is;a resistance electrode (131) the source electrode (113) with a supply voltage section, which a voltage or an energy is fed, andthe resistance electrode (131) a resistor rgate , the resistance electrode (131) a width ln2 and the gate electrode (117) has a gate length ln1, wherein the following applies:Ron = RgateandLn2 = ln1.**Known: the term "=" which may be mentioned here are also to be understood as meaning deviations, such as manufacturing tolerances.
机译:Mos(金属-氧化物-半导体)-晶体管,连接到栅极(117),漏极(115)以及源极(113),其中mos-晶体管(111)aa-状态-电阻r <当处于状态的mos-晶体管(111)是电阻电极(131),具有供应电压或能量的电源电压部分的源电极(113)以及电阻时,电极(131)的电阻r gate ,电阻电极(131)的宽度ln2,栅电极(117)的栅极长度ln1,其中:R on = R gate 并且Ln2 = ln1。**已知:在这里可能提到的术语“ =”也应理解为含义偏差,例如制造公差。

著录项

  • 公开/公告号DE10004200B4

    专利类型

  • 公开/公告日2007-02-01

    原文格式PDF

  • 申请/专利权人

    申请/专利号DE2000104200

  • 发明设计人

    申请日2000-02-01

  • 分类号H01L29/78;H01L21/336;H01L27/092;

  • 国家 DE

  • 入库时间 2022-08-21 20:30:11

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