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Structured semiconductor chip, for use with electronic component, has passivation layer made of silicon carbide comprising high breaking point/tensile strength, where layer is provided on silicon oxide layer
Structured semiconductor chip, for use with electronic component, has passivation layer made of silicon carbide comprising high breaking point/tensile strength, where layer is provided on silicon oxide layer
The chip has an intermediate oxide layer (1) formed between an upper conductor consisting of aluminum and a lower conductor, and a silicon oxide layer (3) provided on the intermediate oxide layer (1) and the upper conductor (2). A passivation layer (5) made of silicon carbide having high breaking point/tensile strength is provided on the silicon oxide layer, where the thickness of the passivation layer is 100-1,000 nanometer.
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