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Semiconductor memory device e.g. flash memory, has sector control simultaneously controlling wordlines and connected to wordlines, where control has programmable sector memory for storing of sectors and wordlines, and belongs to sectors
Semiconductor memory device e.g. flash memory, has sector control simultaneously controlling wordlines and connected to wordlines, where control has programmable sector memory for storing of sectors and wordlines, and belongs to sectors
The device has a number of wordlines (10a-10c) that are connected to a control gate of memory cells e.g. electronically erasable programmable read-only memory (EEROM), which are arranged in row. A wordline decoder (100) is designed to decode a row address of a specific memory cell. A sector control is provided for simultaneous control of wordlines. The sector control is connected to each wordline and includes a programmable sector memory for storing of sectors and wordlines, where the control belongs to each sector. Independent claims are also included for the following: (1) a method of controlling the wordlines of each sector of a semiconductor device (2) a method for adjusting the sectors of a semiconductor memory device (3) a method of testing of wordline decoders of a semiconductor memory device (4) a method for testing of wordline of a semiconductor device.
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