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Serial to parallel and parallel to serial converter for digital data is based on coupled latching registers
Serial to parallel and parallel to serial converter for digital data is based on coupled latching registers
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机译:串行到并行和并行到串行转换器的数字数据基于耦合的锁存寄存器
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摘要
The serial to parallel converter circuit handles a data stream of m bits where the m bits contains 2n data bits and k data bits. The data is received by a first register [162] consisting of m-1 D type register latches [DF]. This is coupled to a second register having m register stages [164].
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