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Lock-in circuit for absolute phase synchronization

机译:锁定电路实现绝对相位同步

摘要

A small-scale absolute-phasing synchronization capturing circuit for absolute phasing of a received signal by selectively transmitting a baseband signal demodulated through a demodulator (1), a baseband signal subjected to phase rotation through a remapper (11), a baseband signal outputted from a first inverting means, and a baseband signal outputted from a second inverting means based on the phase angle of the received signal relative to the phase of the transmission signal. The most significant bit in the demodulated baseband signal and the most significant bit in the baseband signal subjected to phase rotation through the remapper (11) are extracted and a frame synchronization signal is captured according to the extracted significant bit.
机译:小型绝对相位同步捕获电路,用于通过选择性地发送通过解调器(1)解调的基带信号,通过重映射器(11)进行相位旋转的基带信号,从接收器输出的基带信号来对接收信号进行绝对定相第一反相装置,和第二反相装置根据接收信号相对于发射信号的相位的相位角从第二反相装置输出的基带信号。提取经过解调的基带信号中的最高有效位和经过重映射器(11)进行相位旋转的基带信号中的最高有效位,并根据提取的有效位捕获帧同步信号。

著录项

  • 公开/公告号DE69836019T2

    专利类型

  • 公开/公告日2007-01-11

    原文格式PDF

  • 申请/专利权人

    申请/专利号DE1998636019T

  • 发明设计人

    申请日1998-06-29

  • 分类号H04L27/22;

  • 国家 DE

  • 入库时间 2022-08-21 20:27:25

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