The apparatus with a power amplifier with a feedforward linearizer with the use of a barrel algorithm

摘要

A feedforward linearizer for amplifying an input signal comprises a signal cancellation circuit which has a first branch and a second branch. A first amplifier provided in the first branch receives the input signal intended to be amplified and generates an output signal received by a signal cancellation vector modulator. A signal cancellation adder receives the signal generated by the signal cancellation vector modulator and the input signal via the second branch and provides an error signal. The feedforward linearizer also comprises an error cancellation circuit that has a first branch and a second branch. An error cancellation adder in the first branch receives the output signal provided by the first amplifier and generates the output signal of the linearizer. An error cancellation vector modulator in the second branch receives an error signal provided by the signal cancellation adder and provides an error adjusted signal to a second auxiliary amplifier. The second auxiliary amplifier provides an input signal to the error cancellation adder. A digital signal processor, comprising a signal processing circuit, provides a signal cancellation adjustment signal, &agr;, to the signal cancellation vector modulator and an error cancellation adjustment signal, &bgr;, to the error cancellation vector modulator, such that the output signal of the signal cancellation adder is a signal that substantially represents the error components provided by the first amplifier, and the output signal of the error cancellation adder is an amplified version of the input signal, with substantially no intermodulation components.