首页> 外国专利> MODEL CREATION DEVICE FOR HIGH SPEED HARDWARE SIMULATION AND SIMULATION DEVICE THEREFOR

MODEL CREATION DEVICE FOR HIGH SPEED HARDWARE SIMULATION AND SIMULATION DEVICE THEREFOR

机译:高速硬件仿真的模型创建装置及其仿真装置

摘要

PPROBLEM TO BE SOLVED: To provide a model creation device for high speed hardware simulation for quickly executing simulation by converting a model described in hardware operation description language into simulation description. PSOLUTION: RTL description is divided into sequential circuit description (1c) and combinational circuit description (1b), the divided sequential circuit description (1c) is processed into combinational circuit description, and simulation description is reconfigured from the divided combinational circuit description (1b) and the processed combinational circuit description. No sequential circuit is included requiring arithmetic operation for each clock event, and update of input variables other than the clock triggers an arithmetic operation in simulation in stead of a clock event, so that it is possible to generate simulation descriptions for suppressing the frequency of the arithmetic operation. PCOPYRIGHT: (C)2008,JPO&INPIT
机译:

要解决的问题:提供一种用于高速硬件仿真的模型创建设备,以通过将以硬件操作描述语言描述的模型转换为仿真描述来快速执行仿真。

解决方案:RTL描述分为顺序电路描述(1c)和组合电路描述(1b),将划分的顺序电路描述(1c)处理为组合电路描述,并从划分的组合电路描述重新配置仿真描述(1b)和处理后的组合电路说明。不包括需要对每个时钟事件进行算术运算的时序电路,并且除了时钟以外的输入变量的更新会代替时钟事件而触发仿真中的算术运算,因此可以生成用于抑制时钟频率的仿真描述。算术运算。

版权:(C)2008,日本特许厅&INPIT

著录项

  • 公开/公告号JP2008077330A

    专利类型

  • 公开/公告日2008-04-03

    原文格式PDF

  • 申请/专利权人 FUJITSU LTD;

    申请/专利号JP20060254653

  • 发明设计人 YURI EISUKE;

    申请日2006-09-20

  • 分类号G06F17/50;

  • 国家 JP

  • 入库时间 2022-08-21 20:22:34

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