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Memory check system and memory check method, memory check method of signal processing apparatus and signal processing equipment, as well as, memory check program

机译:存储器检查系统和存储器检查方法,信号处理设备和信号处理设备的存储器检查方法以及存储器检查程序

摘要

PPROBLEM TO BE SOLVED: To precisely check a program or coefficient data on a RAM at high speed. PSOLUTION: A program 22 stored in a block having a prescribed size checks a DSP program 23 for every block, compares an operation result 41 with a corresponding parity code 40, and sets a fixed value 44, when the both are matched, or the operation result 41, when the both are not matched, to a register 46. The program 22 on the RAM 20 is similarly checked in the block unit, and sets a fixed value 34, when an operation result 31 is matched to a corresponding parity code 30, or the operation result 31, when the both are not matched, to a register 36. A host determines the validity of the parity code 21 and the programs 22 and 23 on the RAM 20 based on the values of the registers 36 and 46. The host supplies right data to a DSP 2 based on the determination result to correct the content of the RAM 20. The program 22 and the program 23 are alternately checked for each block, and the validity is regularly kept. PCOPYRIGHT: (C)2004,JPO
机译:

要解决的问题:高速精确地检查RAM上的程序或系数数据。解决方案:存储在具有预定大小的块中的程序22针对每个块检查DSP程序23,将运算结果41与相应的奇偶校验码40进行比较,并在两者匹配时设置固定值44,当两者不匹配时,将运算结果41或运算结果41存储到寄存器46。当运算结果31与对应的结果相对应时,以块为单位同样地检查RAM 20上的程序22,并设置固定值34。当两者不匹配时,将奇偶校验码30或运算结果31存储到寄存器36。主机基于寄存器36的值确定RAM 20上的奇偶校验码21以及程序22和23的有效性。主机46根据确定结果向DSP 2提供权利数据,以校正RAM 20的内容。针对每个块交替检查程序22和程序23,并定期保持有效性。

版权:(C)2004,日本特许厅

著录项

  • 公开/公告号JP4135413B2

    专利类型

  • 公开/公告日2008-08-20

    原文格式PDF

  • 申请/专利权人 ソニー株式会社;

    申请/专利号JP20020194452

  • 发明设计人 宮井 功;

    申请日2002-07-03

  • 分类号G06F12/16;G06F9/445;

  • 国家 JP

  • 入库时间 2022-08-21 20:20:45

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