首页> 外国专利> Phase-selective frequency modulation apparatus and phase-selective frequency synthesizer

Phase-selective frequency modulation apparatus and phase-selective frequency synthesizer

机译:选相频率调制装置和选相频率合成器

摘要

PROBLEM TO BE SOLVED: To further reduce EMI by eliminating the limitation for a phase range for a clock signal, to be selected in a modulation clock signal generating circuit.;SOLUTION: The device is first clock selection signals SEL 1-SEL 6 for instructing to select any of the clock signals among m phase clock signal generating means 101 and m phase clock signals CK1-CK6 and constituted with a control means 104 for sequentially outputting first clock selection signals, corresponding to each of the m phase clock signals; an edge emergence timing adjustment arranging means 103 for outputting second clock selection signals SSEL1-SSEL6, corresponding to each of the m phase signals outputted from an m phase clock generator 101; and a modulation clock signal generating means 102 for selecting the clock signal out of the m phase clock signals, based on an activation state in the second clock selection signals SSEL1-SSEL6 outputted from the edge emergence timing adjusting means 103 and outputting a frequency clock signal MCK.;COPYRIGHT: (C)2004,JPO&NCIPI
机译:解决的问题:通过消除对时钟信号的相位范围的限制来进一步降低EMI,时钟信号的相位范围将在调制时钟信号生成电路中选择;解决方案:该设备是用于指示的第一时钟选择信号SEL 1-SEL 6在m个相位时钟信号产生装置101和m个相位时钟信号CK1-CK6中选择任何一个时钟信号,并由一个控制装置104构成,该控制装置104顺序输出对应于m个相位时钟信号的每个的第一时钟选择信号;边缘出现时间调整装置103,用于输出与从m相时钟发生器101输出的m个相位信号相对应的第二时钟选择信号SSEL1-SSEL6;调制时钟信号产生装置102,用于根据从边缘出现定时调节装置103输出的第二时钟选择信号SSEL1-SSEL6中的激活状态,从m个相位时钟信号中选择时钟信号,并输出频率时钟信号。 MCK。; COPYRIGHT:(C)2004,JPO&NCIPI

著录项

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号