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The field up to surface ratio 50 is the zero defect field from wafer rim in

机译:达到表面比率50%的场是晶片边缘中的零缺陷场

摘要

PROBLEM TO BE SOLVED: To improve the yield of a device chip made from one silicon wafer by simply providing a silicon single crystal by a Czochralski method having bettered withstand voltage of oxide film especially in a circumferential part of a wafer without extremely reducing productivity. ;SOLUTION: This silicone single crystal wafer has a defect-free zone having no defective withstand voltage of oxide film in an area up to 50% surface area from the outer periphery of the wafer, especially in an area up to 30mm from the outer periphery of the wafer in a silicon single crystal wafer having a large aperture of ≥6 inches. The method for producing such a silicon single crystal comprises growing the single crystal at a pulling up rate of 80-60%, the limit pulling up rate of a characteristic pulling up device in pulling up the silicon single crystal by a Czochralski method.;COPYRIGHT: (C)1997,JPO
机译:要解决的问题:通过用切克劳斯基方法简单地提供单晶硅来提高由一个硅晶片制成的器件芯片的成品率,该单晶硅具有更好的氧化膜耐压性,特别是在晶片的周边部分,而又没有极大地降低生产率。 ;解决方案:此硅单晶硅片具有一个无缺陷区域,该区域在距晶片外围最多50%的表面积内,尤其是在距外围最多30mm的区域内,没有氧化膜的不良耐压。在具有约6英寸大孔径的硅单晶晶片中,晶片的厚度为1/3。生产这种硅单晶的方法包括以80-60%的提拉率生长单晶,这是通过切克劳斯基方法提拉硅单晶时特性提拉装置的极限提拉率。 :(C)1997,日本特许厅

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