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PROCESSOR ARCHITECTURE, FOR INSTANCE FOR MULTIMEDIA APPLICATIONS
PROCESSOR ARCHITECTURE, FOR INSTANCE FOR MULTIMEDIA APPLICATIONS
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机译:用于多媒体应用实例化的处理器架构
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摘要
A processor architecture for multimedia applications includes processor clusters providing vectorial data processing capability. Processing elements in the processor clusters process both data with a bit length N and data with bit lengths N/2, N/4, and so on according to a Single Instruction Multiple Data (SIMD) function. A load unit loads into the processor clusters data to be processed according to a same instruction. An intercluster data path exchanges data between the processor clusters. The intercluster data path is scalable to activate selected processor clusters. The processor operates simultaneously on SIMD, scalar and vectorial data.
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