This invention presents a CORDIC-based split-radix FFT/IFFT (Fast Fourier Transform/Inverse Fast Fourier Transform) processor dedicated to the computation of 2048/4096/8192-point DFT (Discrete Fourier Transform). The arithmetic unit of butterfly processor and twiddle factor generator are based on CORDIC (Coordinate Rotation Digital Computer) algorithm. An efficient implementation of CORDIC-based split-radix FFT algorithm is demonstrated. All control signals are generated internally on-chip. The modified-pipelining CORDIC arithmetic unit is employed for the complex multiplication. A CORDIC twiddle factor generator is proposed and implemented for saving the size of ROM (Read Only Memory) required for storing the twiddle factors. Compared with conventional FFT implementations, the power consumption is reduced by 25%.
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