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ENHANCED STRESS TRANSFER IN AN INTERLAYER DIELECTRIC BY USING AN ADDITIONAL STRESS LAYER ABOVE A DUAL STRESS LINER IN A SEMICONDUCTOR DEVICE
ENHANCED STRESS TRANSFER IN AN INTERLAYER DIELECTRIC BY USING AN ADDITIONAL STRESS LAYER ABOVE A DUAL STRESS LINER IN A SEMICONDUCTOR DEVICE
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机译:通过在半导体器件中使用双应力衬里上方的附加应力层,增强层间介质中的应力传递
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摘要
By forming an additional stressed dielectric material after patterning dielectric liners of different intrinsic stress, a significant increase of performance in transistors may be obtained while substantially not contributing to patterning non-uniformities during the formation of respective contact openings in highly scaled semiconductor devices. The additional dielectric layer may be provided with any type of intrinsic stress, irrespective of the previously selected patterning sequence.
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