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Integrated circuits verification checks of mask layout database, via the internet method and computer software

机译:通过互联网方法和计算机软件对掩膜版图数据库进行集成电路验证检查

摘要

A system and method for integrated circuits verification checks of mask layout database, via the internet are disclosed. The method includes the submission of mask layout database for a specific verification check, over the internet to a main server. All required setup files are also submitted over the internet to the main server. The results are sent to the user upon check completion via email. The system includes a web based control panel interface to submit and execute all necessary setups and checks types for integrated circuit mask layout database over the internet using secured protocol, implemented within commercial internet browser. The system also offers a PDA (Personal Digital Assistant) interface to launch verification checks via the internet. This approach eliminates the purchase of a full local license and enables affordable prices for small and medium size chip design firms. This fact significantly reduces integrated circuits design cost and time to market factor for chip design corporations, enabling faster deliveries to their end customers.
机译:公开了一种用于通过互联网对掩模版图数据库进行集成电路验证检查的系统和方法。该方法包括通过互联网向主服务器提交用于特定验证检查的掩模版图数据库。所有必需的安装文件也都通过Internet提交到主服务器。检查完成后,将结果通过电子邮件发送给用户。该系统包括基于网络的控制面板界面,以使用商业互联网浏览器中实现的安全协议,通过互联网提交和执行所有必要的设置,并检查集成电路掩膜版图数据库的类型。该系统还提供PDA(个人数字助理)界面,以通过互联网启动验证检查。这种方法消除了购买完整的本地许可证的麻烦,并为中小型芯片设计公司提供了可承受的价格。这一事实大大降低了芯片设计公司的集成电路设计成本和上市时间,从而可以更快地向其最终客户交付产品。

著录项

  • 公开/公告号US2008127028A1

    专利类型

  • 公开/公告日2008-05-29

    原文格式PDF

  • 申请/专利权人 DAN RITTMAN;

    申请/专利号US20060604147

  • 发明设计人 DAN RITTMAN;

    申请日2006-11-27

  • 分类号G06F17/50;

  • 国家 US

  • 入库时间 2022-08-21 20:13:49

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