SYSTEM AND METHOD FOR GENERATING A YIELD MODEL FOR AN INTEGRATED CIRCUIT FABRICATION PROCESS AND METHOD OF MANUFACTURING AN INTEGRATED CIRCUIT USING THE YIELD MODEL

摘要

A system for, and method of, generating a yield model pertaining to an integrated circuit (IC) fabrication process and a method of manufacturing an IC using the yield model. In one embodiment, the method of generating includes: (1) selecting X-variables as candidates for incorporation into the yield model, (2) sorting the candidates into an order based on a ranking criterion and (3) introducing the candidates in the order into a stepwise forward regression model until a marginal significance associated with a candidate to be introduced into the model falls below a threshold.