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ELECTRONIC CIRCUIT DESIGN ANALYSIS TOOL FOR MULTI-PROCESSOR ENVIRONMENTS
ELECTRONIC CIRCUIT DESIGN ANALYSIS TOOL FOR MULTI-PROCESSOR ENVIRONMENTS
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机译:多处理器环境的电子电路设计分析工具
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摘要
One or more technologies described herein can be used for viewing results of a simulation of a software executable in a multi-processor electronic circuit design. A debug environment can display simulation results related to the multiple processors, for example, as a correlated software debug view of the processors. In at least some embodiments, the disclosed technologies can be used to examine a correlation between an error in the design which is shown in the simulation results and one or more inter-processor synchronization events.
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