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Circuit for and method of reading data in an asynchronous FIFO including a backup address circuit for re-reading data
Circuit for and method of reading data in an asynchronous FIFO including a backup address circuit for re-reading data
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机译:用于在异步FIFO中读取数据的电路和方法,包括用于重新读取数据的备用地址电路
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摘要
A circuit for enabling reading data in an asynchronous FIFO memory of an integrated circuit is described. The circuit comprises a memory storing data in a plurality of slots having a corresponding plurality of addresses. A write address counter stores a write address count, while a read address counter stores a read address count. Finally, a backup circuit receives a read address associated with data read from a slot of the plurality of slots. According to an alternate embodiment, a most significant bit circuit is coupled to an output of the write address counter for setting the most significant bit of the write address. A method of reading data stored in an asynchronous FIFO memory of an integrated circuit is also disclosed.
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