首页> 外国专利> Evaluation method using a TEG, a method of manufacturing a semiconductor device having the TEG, an element substrate and a panel having the TEG, a program for controlling dosage and a computer-readable recording medium recording the program

Evaluation method using a TEG, a method of manufacturing a semiconductor device having the TEG, an element substrate and a panel having the TEG, a program for controlling dosage and a computer-readable recording medium recording the program

机译:使用TEG的评估方法,具有TEG的半导体器件的制造方法,具有TEG的元件基板和面板,用于控制剂量的程序以及记录该程序的计算机可读记录介质

摘要

The reliability of a GOLD structure TFT depends on an impurity concentration in its gate-overlapped region. Thus, it is an object of the present invention to obtain a resistance distribution corresponding to a tapered shape of a gate electrode in a gate-overlapped region. According to the present invention, plural TEGs are manufactured as Lov resistance monitors in which mask alignment is misaligned with several μm interval to perform a resistance measurement on each of the TEGs. Consequently, a resistance distribution corresponding to a tapered shape can be obtained in a channel forming region, a gate-overlapped region and a source/drain region.
机译:GOLD结构TFT的可靠性取决于其栅极重叠区域中的杂质浓度。因此,本发明的目的是获得与栅极重叠区域中的栅电极的锥形形状相对应的电阻分布。根据本发明,制造了多个TEG作为Lov电阻监测器,其中掩模对准以几μm的间隔未对准以对每个TEG执行电阻测量。因此,可以在沟道形成区域,栅极重叠区域和源极/漏极区域中获得与锥形形状相对应的电阻分布。

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