首页> 外国专利> METHOD OF TRIMMING A HARD MASK LAYER, METHOD FOR FABRICATING A GATE IN A MOS TRANSISTOR, AND A STACK FOR FABRICATING A GATE IN A MOS TRANSISTOR

METHOD OF TRIMMING A HARD MASK LAYER, METHOD FOR FABRICATING A GATE IN A MOS TRANSISTOR, AND A STACK FOR FABRICATING A GATE IN A MOS TRANSISTOR

机译:修剪硬掩模层的方法,在MOS晶体管中制造栅极的方法以及在MOS晶体管中制造栅极的堆叠

摘要

A method of trimming hard mask is provided. The method includes providing a substrate, a hard mask layer, and a tri-layer stack on the substrate. The tri-layer stack includes a top photo resist layer, a silicon photo resist layer, and a bottom photo resist layer. The top photo resist layer, the silicon photo resist layer, the bottom photo resist layer, and the hard mask layer are patterned sequentially. A trimming process is performed on the hard mask layer. The bottom photo resist layer of the present invention is thinner and loses some height in the etching process, so the bottom photo resist layer will not collapse.
机译:提供一种修整硬掩模的方法。该方法包括在衬底上提供衬底,硬掩模层和三层堆叠。该三层堆叠包括顶部光致抗蚀剂层,硅光致抗蚀剂层和底部光致抗蚀剂层。依次对顶部光刻胶层,硅光刻胶层,底部光刻胶层和硬掩模层进行构图。在硬掩模层上执行修整工艺。本发明的底部光刻胶层更薄并且在蚀刻过程中损失一些高度,因此底部光刻胶层不会塌陷。

著录项

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号