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Circuits and methods with comparators allowing for offset reduction and decision operations

机译:带有比较器的电路和方法,允许减少偏移量和决策操作

摘要

Circuits and methods may be improved by using ADCs that compensate for the effect of comparator input offset on comparator decisions. Offset compensation may be implemented in an ADC by using an amplifier section between the input of the ADC and a comparator section of the ADC to amplify the signals supplied to the comparator inputs and thereby reduce the effect of comparator offset on the comparator decision. The comparator section may be an autozeroing comparator section that is capable of performing an offset reduction operation to store offset compensation values at capacitors provided at its inputs. The amplifier section may be an autozeroing amplifier section having one or more amplifier stages that are capable of performing an offset reduction operation to store offset compensation values at capacitors provided at their inputs. Offset compensation may also be implemented using an autozeroing comparator section without a preceding amplifier section.
机译:可以使用补偿比较器输入偏移对比较器决策的影响的ADC来改善电路和方法。可以通过使用ADC输入和ADC比较器之间的放大器部分在ADC中实现失调补偿,以放大提供给比较器输入的信号,从而减少比较器失调对比较器决策的影响。比较器部分可以是自动调零比较器部分,其能够执行偏移减少操作以在其输入处提供的电容器处存储偏移补偿值。放大器部分可以是具有一个或多个放大器级的自动归零放大器部分,该放大器级能够执行偏移减小操作以将偏移补偿值存储在其输入处提供的电容器处。偏移补偿也可以使用自动调零比较器部分来实现,而不需要前面的放大器部分。

著录项

  • 公开/公告号US7400279B2

    专利类型

  • 公开/公告日2008-07-15

    原文格式PDF

  • 申请/专利权人 ALEXANDER KRYMSKI;

    申请/专利号US20070777905

  • 发明设计人 ALEXANDER KRYMSKI;

    申请日2007-07-13

  • 分类号H03M1/06;

  • 国家 US

  • 入库时间 2022-08-21 20:11:20

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