Redundancy method and software to provide improved interconnect efficiency for programmable logic devices

摘要

A method and computer readable medium for implementing redundancy on a programmable logic device with improved interconnect efficiency. The method and medium includes: determining if a first wire segment of a first wire channel requires a programmed connection to a resource in the row furthest from the buffer driving the first wire segment and spanned by the first wire segment; reserving a next segment in the first channel if the first wire segment of the first wire channel requires a programmed connection to a resource in the row furthest from the buffer driving the first wire segment and spanned by the first wire segment; and assuming a maximum delay path including the programmable signal propagation delay of the reserved next segment and a stitching element coupled between the first segment and the reserved next segment of the first channel.