Method and apparatus for the memory self-test of embedded memories in semiconductor chips

摘要

Method for the memory self-test of embedded memories (2, 3, 4) in semiconductor chips (1), a memory address range (8) being assigned to a memory (2) to be tested and addresses from the same memory address range of the memory to be tested being allocated to at least one memory self-test controller register (6R2) of a memory self-test controller for storing memory test configuration data.