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Method of flexible clock placement for integrated circuit designs using integer linear programming

机译:使用整数线性编程的集成电路设计的灵活时钟放置方法

摘要

A method of global clock placement for a circuit design to be implemented on a programmable logic device (PLD) can include identifying clock properties for the circuit design and identifying physical clock region attributes for the PLD. The method further can include specifying an Integer Linear Programming formulation (ILP) of a clock placement problem for the circuit design from the clock properties and the physical clock region attributes. The ILP formulation can be solved to determine whether a feasible clock placement exists for the circuit design.
机译:一种用于在可编程逻辑器件(PLD)上实现的电路设计的全局时钟放置方法,可以包括识别用于电路设计的时钟属性和识别用于PLD的物理时钟区域属性。该方法还可以包括从时钟属性和物理时钟区域属性为电路设计指定时钟放置问题的整数线性规划公式(ILP)。可以求解ILP公式以确定电路设计是否存在可行的时钟放置。

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