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Method of searching paths suffering from the electrostatic discharge in the process of an integrated circuit design
Method of searching paths suffering from the electrostatic discharge in the process of an integrated circuit design
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机译:在集成电路设计过程中寻找遭受静电放电的路径的方法
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摘要
A method of searching paths that are susceptible to electrostatic discharge (ESD) at the beginning of an integrated circuit (IC) design is disclosed that includes a circuit spreading out algorithm, a matrix closure algorithm, and a supernode algorithm. The found paths are required to satisfy conditions including that (a) they are connected from a gate of a transistor to a source or a drain thereof, and (b) the head node and the tail node of each path are pins of a top level of the IC. −1/0/1 matrix multiplication is employed by both the circuit spreading out algorithm and the matrix closure algorithm so as to obtain a result of node connections after a plurality of matrix self-multiplications.
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