首页> 外国专利> SEMICONDUCTOR FAILURE ANALYZING APPARATUS, SEMICONDUCTOR FAILURE ANALYZING METHOD, SEMICONDUCTOR FAILURE ANALYZING PROGRAM AND SEMICONDUCTOR FAILURE ANALYZING SYSTEM

SEMICONDUCTOR FAILURE ANALYZING APPARATUS, SEMICONDUCTOR FAILURE ANALYZING METHOD, SEMICONDUCTOR FAILURE ANALYZING PROGRAM AND SEMICONDUCTOR FAILURE ANALYZING SYSTEM

机译:半导体故障分析装置,半导体故障分析方法,半导体故障分析程序和半导体故障分析系统

摘要

A failure analysis apparatus 10 is composed of an inspection information acquirer 11 for acquiring at least a pattern image P1 of a semiconductor device, a layout information acquirer 12 for acquiring a layout image P3, a failure analyzer 13 for analyzing a failure of the semiconductor device, and an analysis screen display controller 14 for letting a display device 40 display information about the failure analysis. The analysis screen display controller 14 generates a superimposed image in which the pattern image P1 and the layout image P3 are superimposed, as an image of the semiconductor device to be displayed by the display device 40, and sets a transmittance of the layout image P3 relative to the pattern image P1 in the superimposed image. This substantializes a semiconductor failure analysis apparatus, analysis method, analysis program, and analysis system capable of securely and efficiently carrying out the analysis of the failure of the semiconductor device.
机译:故障分析装置10由用于至少获取半导体器件的图案图像P1的检查信息获取器11,用于获取布局图像P3的布局信息获取器12,用于分析半导体器件的故障的故障分析器13组成。分析屏幕显示控制器14和分析屏幕显示控制器14用于使显示装置40显示关于故障分析的信息。分析画面显示控制器14生成其中图案图像P1和布局图像P3被叠加的叠加图像,作为要由显示设备40显示的半导体器件的图像,并且相对于布局图像P3设置透射率。叠加图像中的图案图像P1。这使半导体故障分析装置,分析方法,分析程序和分析系统实质化,能够安全且有效地进行半导体器件的故障分析。

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