首页> 外国专利> METHOD FOR FABRICATING THE RECESSED GATE USING CELL-HALLO IMPLANTATION

METHOD FOR FABRICATING THE RECESSED GATE USING CELL-HALLO IMPLANTATION

机译:细胞-霍尔洛植入法制备后门的方法

摘要

In cell threshold voltage control after first cell-ion implanting ring of light process, a kind of method is arranged to prevent the variation of a cell threshold voltage using a recess gate of the one unit-ion implanting ring of light for manufacturing by executing second cell-ion implanting ring of light process. A part of semi-conductive substrate (300) is etched to form a recess portion ditch, determines a dotted line contact area (304) and a storage node contact region (306). The gate stack (332) to overlap each other with recess portion ditch is formed. The first mask layer pattern formation being open with one is in gate stack. Opening exposes a surface of semiconductor substrate corresponding with bit line contact area. One first cell-ion implanting ring of light will carry out implant impurity as an ion implanting mask by using the first mask layer model and enter bit line contact area. First mask layer model is removed. One gate spacer is formed in one side of gate stack. The second mask layer pattern formation with an opening is in gate stack. Opening exposes a surface of semiconductor substrate corresponding with bit line contact area. One second cell-ion implanting ring of light will carry out implant impurity, and by using the second mask layer model as an ion implantation mask, gas diffusion velocity, which is faster than, enters bit line contact area for the impurity of the first cell-ion implanting ring of light. Second mask layer model is removed.
机译:在光的第一单元离子注入环之后的单元阈值电压控制中,布置了一种方法,该方法通过执行用于制造的一个单位离子注入环的凹入栅极来防止单元阈值电压的变化。细胞离子植入环的光过程。蚀刻半导体衬底(300)的一部分以形成凹槽部分沟,确定虚线接触区域(304)和存储节点接触区域(306)。形成以凹部沟彼此重叠的栅极堆叠件(332)。在栅极堆叠中敞开的第一掩模层图案形成。开口暴露出半导体衬底的对应于位线接触面积的表面。一个第一单元离子注入光环将通过使用第一掩模层模型执行注入杂质作为离子注入掩模,并进入位线接触区域。删除第一个遮罩层模型。在栅极堆叠的一侧中形成一个栅极隔离物。在栅极堆叠中具有开口的第二掩模层图案形成。开口暴露出半导体衬底的对应于位线接触面积的表面。一个第二个单元离子注入光环将注入杂质,并且通过使用第二个掩模层模型作为离子注入掩模,气体扩散速度比第一个单元的杂质进入位线接触区域的速度要快。离子注入光环。第二个遮罩层模型被删除。

著录项

  • 公开/公告号KR20080087281A

    专利类型

  • 公开/公告日2008-10-01

    原文格式PDF

  • 申请/专利权人 HYNIX SEMICONDUCTOR INC.;

    申请/专利号KR20070029269

  • 发明设计人 KANG HYUN SEOK;EUN BYUNG SOO;

    申请日2007-03-26

  • 分类号H01L21/336;H01L21/265;

  • 国家 KR

  • 入库时间 2022-08-21 19:53:00

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