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High-Performance Cryptographic Device using Multiple Ciphercores and its Operation Method
High-Performance Cryptographic Device using Multiple Ciphercores and its Operation Method
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机译:使用多个密码核的高性能密码设备及其操作方法
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摘要
A high performance encryption apparatus using a multiple encryption engine is provided to supply a security service of a high speed by constituting an encryption algorithm such as a block encryption, a hash, a message authentication code, a public key calculation, and a random number generation with a multiple encryption engine. A PCI-Express host matching unit(100) has a PCI- Express terminal unit and a TLP packet analysis and generation device to perform memory request, completion, and write request processes by analyzing an RX TLP(Transport Layer Port) packet through a host bus from a host. A multiple encryption engine management unit(110) analyzes a command block included in the TLP packet, and determines a processing sequence based on a scheduling algorithm which is set to a work scheduler and a state list for an available resource of an encryption core. A multiple encryption engine unit(120) receives and analyzes the command block at the encryption core, and operates the encryption core by transmitting a session ID and a command to a session memory matching unit. A system control unit(130) processes a system initial function, a public key received from the multiple encryption engine management unit(110), and a command block with reference to the key management. A session memory unit(140) is coupled to the multiple encryption engine unit and stores session data which is requested in encryption algorithm processing operation.
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