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Semiconductor Circuit using Vertical Bipolar Junction Transistor implemented by deep n-well CMOS process
Semiconductor Circuit using Vertical Bipolar Junction Transistor implemented by deep n-well CMOS process
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机译:采用深n阱CMOS工艺实现的使用垂直双极结型晶体管的半导体电路
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摘要
Deep enwel Mr. semiconductor circuit using a vertical bipolar junction transistors implemented in MOS process is started. Amplifier circuit according to the present invention, coupled to the input node and the output node and, amplifying the input signal and having an amplifier transistor and a load connected between the output node and a predetermined power supply voltage node, for generating an output signal. The amplifying transistor is implemented with a vertical-type bipolar junction transistors implemented as deep enwel CMOS process. Variable gain amplifier circuit or a single pole log domain circuit according to the invention is also configured to include a vertical-type bipolar junction transistors implemented as deep enwel CMOS process. According to the present invention, a break in the hold submitter threaded region having superior properties compared to the device in place of MOSFET devices that operate dip enwel seed a vertical BJT devices that can be obtained from moss process amplifier, variable gain amplifier circuit and a single-pole log domain By using such a circuit, the characteristics of these circuits is improved.
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