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Synchronization Control Device, Dual Port Memory Having Synchornization Control Device and Method for Controlling Synchonization in Dual Port Memory
Synchronization Control Device, Dual Port Memory Having Synchornization Control Device and Method for Controlling Synchonization in Dual Port Memory
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机译:同步控制装置,具有同步控制装置的双端口存储器以及用于控制双端口存储器中的同步的方法
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摘要
A dual port memory having a synchronization control device, a multi-processor system having the same, and a synchronization control method thereof are provided to guarantee continuous synchronization between tasks even if context switching occurs between the tasks in a multitasking environment executing a plurality of tasks in one processor. A memory array(210) has at least one shared memory area(211-217) accessed by first and second processors(110,120). A first memory interface(220) performs data read/write operations from/on the shared memory area based on address/control signals of the first processor. A second memory interface(230) performs the data read/write operation from/on the shared memory area based on address/control signals of the second processor. A memory access controller(295) includes a plurality of semaphore cells(260-290) controlling exclusive access to the shared memory areas, and a synchronization controller(240) inputting/outputting access request/grand signals independently on the semaphore cell corresponding to the shared memory area which is accessed by at least one task executed in the first or second processor.
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