Testing method for testing integrated circuit, involves transferring one instruction by command pins and another instruction by part of address pin from test device to integrated circuit with clock rate lower than internal clock rate

摘要

The testing method involves providing (R1) an integrated circuit which operates with an internal clock rate. An instruction is transferred (R2) by a command pins and another instruction is transferred by a part of an address pin from a test device to the integrated circuit with a clock rate which is lower that the internal clock rate. The former and the latter transferred instructions is processed with the internal clock within a clock cycle of the test clock of the integrated circuit. Independent claims are also included for the following: (1) an integrated circuit with a number of address pins (2) a test system for testing an integrated circuit.