首页> 外国专利> Non volatile multi-bit memory unit for use in multi-bit flash memory system of e.g. mobile terminal, has cache memory with random access memory and electrically coupled with page buffer that comprises set of buffers

Non volatile multi-bit memory unit for use in multi-bit flash memory system of e.g. mobile terminal, has cache memory with random access memory and electrically coupled with page buffer that comprises set of buffers

机译:非易失性多位存储单元,用于例如图1的多位闪存系统。移动终端,其具有带有随机存取存储器的高速缓冲存储器,并且与包括缓冲器组的页面缓冲器电耦合。

摘要

The memory unit (105) has a memory cell array (110) with a set of memory cells, and a page buffer (120) electrically coupled with the memory cell array. The page buffer comprises a set of buffers (125) for storing a bit from multi-bit data that is written to or read from the set of memory cells. A cache memory with a random access memory is electrically coupled with the page buffer. The cache memory stores another bit of multi-bit data, which is written to and read from the memory cells. Independent claims are also included for the following: (1) a system comprising a non volatile multi-bit memory unit (2) a method for programming a non volatile multi-bit memory unit.
机译:存储器单元(105)具有具有一组存储器单元的存储器单元阵列(110),以及与存储器单元阵列电耦合的页缓冲器(120)。页缓冲器包括一组缓冲器(125),用于存储来自多位数据的位,该多位数据被写入或从该组存储单元读取。具有随机存取存储器的高速缓冲存储器与页面缓冲器电耦合。高速缓冲存储器存储另一位多位数据,该多位数据被写入和从存储单元读取。还包括以下方面的独立权利要求:(1)包括非易失性多位存储单元的系统(2)用于编程非易失性多位存储单元的方法。

著录项

  • 公开/公告号DE102007023533A1

    专利类型

  • 公开/公告日2007-12-27

    原文格式PDF

  • 申请/专利权人 SAMSUNG ELECTRONICS CO. LTD.;

    申请/专利号DE20071023533

  • 发明设计人 LEE HO-KIL;LEE JIN-YUB;

    申请日2007-05-18

  • 分类号G11C11/56;G11C16/06;

  • 国家 DE

  • 入库时间 2022-08-21 19:49:15

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