CLOCK DISTRIBUTION CIRCUIT DESIGN METHOD AND CLOCK DISTRIBUTION CIRCUIT DESIGN DEVICE

摘要

PROBLEM TO BE SOLVED: To minimize a clock skew in designing a semiconductor clock distribution circuit which has a buffer disposition prohibition area.;SOLUTION: Buffer insertion is performed (S70) to a place other than a buffer disposition prohibition area, so that the kind of buffer on a wiring path from a clock driver cell to each terminal cell and a shape of the wiring path driven by the buffer become completely identical at each stage after the wiring path whose shape from the clock driver cell to each terminal cell becomes completely symmetrical is generated (S50). After a buffer insertion position on the path to an optional terminal cell is determined, the buffer insertion position is copied onto a path to other terminal cells. The buffer disposition prohibition area is considered by setting all buffer disposition prohibition areas present on the wiring path to all the terminal cells on the path to one of the terminal cells.;COPYRIGHT: (C)2009,JPO&INPIT