DESIGN ENVIRONMENT TRANSPARENT TYPE FUNCTION TEST SYSTEM

摘要

PPROBLEM TO BE SOLVED: To enable a transparent type function test with a built-in CPU without converting a design test pattern by connecting a mounted FPGA and a device to be tested to perform a test in a real machine. PSOLUTION: A design environment transparent type function test system mounts, on the FPGA, an HDL design environment used for verification on a simulator including the CPU, achieves a transparent type function test verifying an actual circuit (S6), and achieves a co-verification environment by means of the transparent type function test with the built-in CPU. PCOPYRIGHT: (C)2009,JPO&INPIT