首页> 外国专利> WIRING SELECTION METHOD AND DEVICE, WIRING SELECTION PROGRAM, COMPUTER-READABLE RECORDING MEDIUM CONTAINING WIRING SELECTION PROGRAM, AND DELAY IMPROVING METHOD

WIRING SELECTION METHOD AND DEVICE, WIRING SELECTION PROGRAM, COMPUTER-READABLE RECORDING MEDIUM CONTAINING WIRING SELECTION PROGRAM, AND DELAY IMPROVING METHOD

机译:接线选择方法和装置,接线选择程序,包含接线选择程序的计算机可读记录介质以及延迟改进方法

摘要

The present invention relates to a net/wiring selection method for selecting, from among nets/wirings wired on the basis of layout information, a net/wiring whose layout is to be changed with priority in order to improve a delay. To enable efficient elimination of a critical path, the method is arranged to include a wiring capacitance lower limit computation step for computing wiring capacitance lower limits on the basis of layout information; an inter-wiring capacitance computation step for computing, as an inter-wiring capacitance, a difference between a real wiring capacitance and the wiring capacitance lower limit; a parallel wiring length extraction step for extracting a parallel wiring length existing between adjacent wirings of the respective wirings; and a selection step for selecting a net/wiring whose layout is to be changed, on the basis of the inter-wiring capacitance, the parallel wiring length, and a slack value.
机译:本发明涉及一种网络/布线选择方法,用于从基于布局信息布线的网络/布线中选择其布局要优先改变以改善延迟的网络/布线。为了能够有效地消除关键路径,该方法被布置为包括布线电容下限计算步骤,用于基于布局信息来计算布线电容下限。布线间电容计算步骤,用于计算实际布线电容和布线电容下限值之间的差作为布线间电容;平行配线长度提取步骤,用于提取各配线的相邻配线之间存在的平行配线长度。以及根据配线间电容,平行配线长度和松弛值来选择要改变布局的网络/配线的选择步骤。

著录项

  • 公开/公告号JP4284235B2

    专利类型

  • 公开/公告日2009-06-24

    原文格式PDF

  • 申请/专利权人 富士通株式会社;

    申请/专利号JP20040168969

  • 发明设计人 池田 弘;

    申请日2004-06-07

  • 分类号G06F17/50;

  • 国家 JP

  • 入库时间 2022-08-21 19:39:40

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