首页> 外国专利> TARGET COMPUTER PROCESSOR UNIT (CPU) DETERMINATION DURING CACHE INJECTION USING INPUT/OUTPUT (I/O) HUB/CHIPSET RESOURCES

TARGET COMPUTER PROCESSOR UNIT (CPU) DETERMINATION DURING CACHE INJECTION USING INPUT/OUTPUT (I/O) HUB/CHIPSET RESOURCES

机译:使用输入/输出(I / O)集线器/芯片组资源确定高速缓存注入期间的目标计算机处理器单元(CPU)

摘要

A method, system, and computer program product for target computer processor unit (CPU) determination during cache injection using I/O hub/chipset resources are provided. The method includes creating a cache injection indirection table on the input/output (I/O) hub or chipset. The cache injection indirection table includes fields for address or address range, CPU identifier, and cache type. In response to receiving an input/output (I/O) transaction, the hub/chipset reads the address in an address field of the I/O transaction, looks up the address in the cache injection indirection table, and injects the address and data of the I/O transaction to a target cache associated with a CPU as identified in the CPU identifier field when, in response to the look up, the address is present in the address field of the cache injection indirection table.
机译:提供一种用于在使用I / O集线器/芯片组资源的高速缓存注入期间确定目标计算机处理器单元(CPU)的方法,系统和计算机程序产品。该方法包括在输入/输出(I / O)集线器或芯片组上创建高速缓存注入间接表。高速缓存注入间接表包括地址或地址范围,CPU标识符和高速缓存类型的字段。响应于接收到输入/输出(I / O)事务,集线器/芯片组读取I / O事务的地址字段中的地址,在高速缓存注入间接表中查找该地址,并注入该地址和数据当响应于查找,在高速缓存注入间接表的地址字段中存在该地址时,向与CPU标识符字段中标识的与CPU关联的目标高速缓存的I / O事务发送数据。

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