首页> 外国专利> QUADRATURE-INPUT, QUADRATURE-OUTPUT, DIVIDER AND PHASE LOCKED LOOP, FREQUENCY SYNTHESISER OR SINGLE SIDE BAND MIXER

QUADRATURE-INPUT, QUADRATURE-OUTPUT, DIVIDER AND PHASE LOCKED LOOP, FREQUENCY SYNTHESISER OR SINGLE SIDE BAND MIXER

机译:正交输入,正交输出,分频器和锁相环,频率合成器或单边混频器

摘要

The present invention relates to a quadrature divider which may be used in a phase locked loop or frequency synthesiser or with a single side band mixer. According to a preferred embodiment the divider takes a quadrature input and has a quadrature output. The divider has four analog mixers 1, 2, 3 and 4. The first two mixers 1, 2 take the in-phase quadrature input, while the second mixers 3, 4 take the quadrature-phase quadrature input. The outputs and feedback loops of the mixers are properly arranged such that the in-phase and quadrature-phase outputs of the divider have a determinisitic phase sequence relationship based on the phase sequence relationship of the corresponding quadrature inputs. Third order harmonics may be minimised or reduced by addition or subtraction of the mixer outputs. As the divider is able to take a quadrature input, there is no need for a dummy divider in the phase locked loop, thus saving space and power.
机译:正交除法器本发明涉及一种正交除法器,它可以用在锁相环或频率合成器中,或与单边带混频器一起使用。根据一个优选实施例,除法器采用正交输入并具有正交输出。分频器具有四个模拟混音器 1、2、3 4 。前两个混频器 1、2 采用同相正交输入,而第二个混频器 3、4 采用正交相正交输入。适当配置混频器的输出和反馈环路,以使分频器的同相和正交相输出具有基于相应正交输入的相序关系的确定性相序关系。通过混频器输出的加法或减法,可以使三阶谐波最小化或降低。由于分频器能够接受正交输入,因此在锁相环中无需虚拟分频器,从而节省了空间和功耗。

著录项

  • 公开/公告号US2009068975A1

    专利类型

  • 公开/公告日2009-03-12

    原文格式PDF

  • 申请/专利权人 HOWARD CAM LUONG;HUI ZHENG;

    申请/专利号US20070852702

  • 发明设计人 HUI ZHENG;HOWARD CAM LUONG;

    申请日2007-09-10

  • 分类号H04B1/00;H03K5/13;

  • 国家 US

  • 入库时间 2022-08-21 19:35:53

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