Virtual debug port in single-chip computer system

摘要

The invention is a method and apparatus for debugging of software on an array-type single chip computer system 16 without provision of dedicated debugging hardware on the chip. This is accomplished by suitable operating instructions that cause a hardware portion of array 16 to operate as a virtual background debug mode port 10 for one 12 and more hardware portions in the array. Virtual debug port 10 communicates with an adjacent target hardware portion 12 via their common directly connected single-drop bus 16, and with an external user interface system through an input/output (I/O) port 28, by passing the debugging information through other hardware portions 52 of the array to a peripheral hardware portion 22 adapted with the I/O port 28. The method of the present invention includes a retriever program, sometimes called a “head segment”, operating in the virtual debug port hardware portion, and further software portions referred to as “stream segment” and “tail segment” which are resident and operating in other hardware portions of the array and which interoperate cooperatively with the retriever program to implement communication of data and instructions between the virtual debug port and the user interface. The method includes a portion referred to as “delivery segment” which is prepared by the user and transmitted from the user interface system to the chip, and contains the head segment, stream segments, and tail segment programs as a payload, which it delivers and stores in appropriate other hardware portions of array 16.