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Digitally controlled system on-chip (SOC) clock generator

机译:数控系统片上(SOC)时钟发生器

摘要

A clock generator includes a clock circuit and a voltage-controlled oscillator in a phase-locked loop. The clock circuit monitors input clock signals and selects one of the input clock signals based on characteristics of the input clock signals. The voltage-controlled oscillator generates a reference clock signal based on the selected clock signal. The clock circuit also includes synthesizers for generating clock signals, each of which has a frequency being a non-integer multiple of a frequency of the reference clock signal. Additionally, the clock circuit individually offsets the clock signals generated by the synthesizers relative to the reference clock signal. The clock generator is capable of switching the input clock signal during operation of the clock generator while maintaining the reference clock signal. Further, the clock generator is programmable to control operation of the clock circuit.
机译:时钟发生器在锁相环中包括时钟电路和压控振荡器。时钟电路监视输入时钟信号,并根据输入时钟信号的特性选择输入时钟信号之一。压控振荡器基于所选时钟信号生成参考时钟信号。时钟电路还包括用于生成时钟信号的合成器,每个时钟信号的频率是参考时钟信号的频率的非整数倍。另外,时钟电路相对于参考时钟信号分别偏移合成器生成的时钟信号。时钟发生器能够在时钟发生器的操作期间切换输入时钟信号,同时保持参考时钟信号。此外,时钟发生器是可编程的,以控制时钟电路的操作。

著录项

  • 公开/公告号US7573303B1

    专利类型

  • 公开/公告日2009-08-11

    原文格式PDF

  • 申请/专利权人 JI FU CHI;YI LI;

    申请/专利号US20070781452

  • 发明设计人 JI FU CHI;YI LI;

    申请日2007-07-23

  • 分类号H03B21/00;H03L7/06;

  • 国家 US

  • 入库时间 2022-08-21 19:33:31

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