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Cross-chip communication mechanism in distributed node topology to access free-running scan registers in clock-controlled components
Cross-chip communication mechanism in distributed node topology to access free-running scan registers in clock-controlled components
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机译:分布式节点拓扑中的跨芯片通信机制,用于访问时钟控制组件中的自由运行扫描寄存器
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摘要
A method of communicating between processing units on different integrated circuit chips in a multi-processor computer system by issuing a command from a source processing unit to a destination processing unit, receiving the command at the destination processing unit while the destination processing unit is processing program instructions, and accessing free-running, scan registers in clock-controlled components of the destination processing unit without interrupting processing of the program instructions by the destination processing unit. The access may be a read from status or mode registers of the destination processing unit, or write to control or mode registers. Many processing units can be interconnected in a ring topology, and the access command can be passed from the source processing unit through several other processing units before reaching the destination processing unit.
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