A method is provided which creates an architecture of a reconfigurable logic core. The architecture can be deployed for various purposes and its implementation is costefficient in terms of area, performance and power. The invention relies on the perception that a template can be used to describe such an architecture. The architecture can then easily be created as an instance of the template. The template is a model which defines logic components, routing components and interface components of a reconfigurable logic core. For example, logic components may be logic elements, processing elements, logic blocks, logic tiles and arrays in a hierarchical order. Routing components may comprise routing channels comprising routing tracks which provide interconnection means between the logic components. Interface components may be input and output ports. The model is configured by a number of parameters; the value of these parameters is in accordance with an application domain.
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