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APPARATUS, METHOD AND PROGRAM PRODUCT FOR ADAPTIVE REAL-TIME POWER AND PERFOMANCE OPTIMIZATION OF MULTI-CORE PROCESSORS

机译:用于多核处理器的自适应实时功率和性能优化的装置,方法和程序产品

摘要

An apparatus, method and program product for optimizing core performance and power in of a multi-core processor. The apparatus includes a multi-core processor coupled to a clock source providing a clock frequency to one or more cores, an independent power supply coupled to each core for providing a supply voltage to each core and a Phase-Locked Loop (PLL) circuit coupled to each core for dynamically adjusting the clock frequency provided to each core. The apparatus further includes a controller coupled to each core and being configured to collect performance data and power consumption data measured for each core and to adjust, using the PLL circuit, a supply voltage provided to a core, such that, the operational core frequency of the core is greater than a specification core frequency preset for the core and, such that, core performance and power consumption is optimized.
机译:一种用于优化多核处理器的核心性能和功率的装置,方法和程序产品。该设备包括:耦合到时钟源的多核处理器,该时钟源向一个或多个核提供时钟频率;耦合到每个核的独立电源,用于向每个核提供电源电压;以及锁相环(PLL)电路,耦合到每个内核,以动态调整提供给每个内核的时钟频率。该装置还包括控制器,该控制器耦合到每个核,并且被配置为收集针对每个核测量的性能数据和功耗数据,并使用PLL电路来调整提供给核的电源电压,以使得该核的工作核频率为0。内核大于为内核预设的规范内核频率,从而优化了内核性能和功耗。

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